1. Field of the Invention
The present invention relates generally to non-volatile magnetic memory and particularly to embedded magnetic random access memory (MRAM).
2. Description of the Prior Art
Magnetic random access memory (MRAM) has gained much notoriety in the recent decade and is expected to ultimately replace non-magnetic memory and even though, it is non-volatile memory itself, it is further expected to replace currently-employed non-volatile memory such as flash and EEPROM. Other expected applications include replacement of disk drives.
One of the problems currently impeding the growth of MRAM is the size of MRAM cells, which are large enough to make them undesirable for many applications requiring small form factor. A typical MRAM cell includes a magnetic tunnel junction (MTJ) and an access transistor used for reading from the MTJ and writing to the MTJ. The access transistor is typically made using known non-magnetic processes, such as CMOS, and obviously, MTJs are made of processes unknown to regular circuitry process such as CMOS. The combination of the foregoing results in large memory cells. Moreover, current manufacturing techniques build the MTJ on top of all circuitry making the cell higher or taller than desired. The large number of such memory cells used in a magnetic memory array makes for larger than desired arrays that are not readily practical for use in various applications.
A number of specific applications benefiting from small MRAM cell sizes are now discussed. Most large random logic circuits, including micro processors need fast and easily accessible memory for scratch pad. This need is mostly satisfied with static RAMs. Static RAMs are volatile fast random access memories with large cell sizes. The reason for a large cell size is that they use 6 transistors per cell, with two of the p-channels, situated inside the n-well. This n-well makes the SRAM cell fairly large. In the older days, system designers used static RAM chips (or integrated circuits), which were mounted on printed boards next to the micro processors. Since the processors have experienced extraordinary growth in popularity over the past several decades and due to an increase in their size, more SRAM is needed on the circuit boards.
These days, processors function much faster and if data has to travel from SRAM to a logic circuit through the board, band width shrinks and high frequency requirements can not be met. Circuit designers prefer to replace SRAM with some thing smaller and faster. DRAMs and Flash memories are generally too slow. To fulfill these requirements, the logic designers place SRAM next to the logic circuit on the same semiconductor device. In this manner, they design all the memory they need on the same chip next to the random logic, and such close proximity satisfies the speed requirements. The main problems with this approach are that 1) the large size of SRAM cells makes the processor large and expensive; and 2) SRAM is volatile and all the information stored in the SRAM which controls the functions of the micro processor is lost with loss of power. To safe guard against such data loss, all the data is typically stored on Flash memory or a hard drive, and it can be loaded into the SRAM from Flash or hard disk.
What is needed is a magnetic random access memory cell including a magnetic tunnel junction and access transistor that is small in form factor.